Home > Published Issues > 2023 > Volume 18, No. 9, September 2023 >
JCM 2023 Vol.18(9): 537-544
Doi: 10.12720/jcm.18.9.537-544

An Efficient Digital Code Shifted Reference (CSR) Based UWB Transceiver on FPGA Platform

Santhosh Kumar R.1, *, Rajashree Narendra1, and Devaraju Ramakrishna 2
1. Department of Dayananda Sagar College of Engineering, Dayananda Sagar University, Bangalore, India; Email: rajashree-ece@dsu.edu.in (R.N.)
2. Department of Electronics and Telecommunication Engineering, Dayananda Sagar College of Engineering, Bangalore, India; Email: devaraju-ece@dsu.edu.in (D.R.)
*Correspondence: rsanthoshkumar15ec@gmail.com (S.K.R.)

Manuscript received February 9, 2023; revised March 30, 2023; accepted April 14, 2023

Abstract—The Ultra-wideband (UWB) system is a wireless technology that offers flexible data rate with better energy efficiency and is used for short-range communications. The Code-shifted-reference (CSR) UWB radio uses the Walsh codes technique to distinguish between the data pulse and reference pulse sequences. The Code-shifted-reference (CSR) UWB transceiver is designed at different code lengths in this manuscript. The CSR-UWB Transmitter is designed using shifting and reference codes, data frame, and pulse generation units. The CSR-UWB receiver is designed using an autocorrelator, data detection, and decoder unit. The data detection unit performs detection and synchronization mechanisms to improve the chip area. The CSR-UWB transceiver is designed and implemented on Artix-7 FPGA on Xilinx environment using Verilog HDL. The CSR-UWB transceiver utilizes the < 1% chip area (Slices) and operates at 267.236 MHz by consuming the total power of 103 mW on Artix-7 FPGA. The CSR-UWB transceiver achieves a throughput of 27.4 Mbps, 356.98 Mbps, and 713.95 Mbps at code lengths 2, 4, and 8, respectively. The hardware efficiency of 0.61 Mbps/Slice, 6.99 Mbps/Slice and 12.1 Mbps/Slice is obtained at code lengths 2, 4, and 8, respectively using proposed Transceiver. The performance metrics like chip area, frequency, power, and throughput of the proposed CSR-UWB transceiver are improved compared to those of existing CSR-UWB transceivers and other PHY transceiver designs.

Keywords—code-shift-reference, ultra-WideBand, FPGA, transceiver, pulse generation

Cite: Santhosh Kumar R., Rajashree Narendra, and Devaraju Ramakrishna, “An Efficient Digital Code Shifted Reference (CSR) Based UWB Transceiver on FPGA Platform," Journal of Communications vol. 18, no. 9, pp. 537-544, September 2023.

Copyright © 2023 by the authors. This is an open access article distributed under the Creative Commons Attribution License (CC BY-NC-ND 4.0), which permits use, distribution and reproduction in any medium, provided that the article is properly cited, the use is non-commercial and no modifications or adaptations are made.