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Design of Reconfigurable System-on-Chip Architecture for Optical Wireless Communication

Syifaul Fuada1, Trio Adiono 2, Angga Pratama Putra 2, Erwin Setiawan2
1. Universitas Pendidikan Indonesia, Indonesia
2. Institut Teknologi Bandung, Bandung, Indonesia
Abstract—To meet the growing demands of the data communication infrastructure in the Internet-of-Things era, alternative methods are needed to complement the current technology, one of which employs optics-based communication. In this paper, we develop optical wireless communication (OWC) infrastructure focuses on digital signal processing (DSP) part. We design System-on-Chip (SoC) architecture based on the Orthogonal Frequency-Division Multiplexing (OFDM) technique with reconfigurable hardware resources. The system developed combines ARM microprocessors with FPGAs. For accelerating the digital processing, several essential parts such as Viterbi decoder, FFT, and time synchronizer are applied to the hardware IP (H/W SoC). While the scheduling is carried out on the software (S/W SoC). With this system, the data communication with other devices can be practiced easily, using various peripherals, i.e., Ethernet, UART, and serial-based connection. Afterward, we exploit the system performance in terms of the hardware resources utilization both for DSP Transmitter and DSP Receiver, also the system latency.

Index Terms—Digital Signal Processing (DSP), Optical Wireless Communication (OWC), OFDM, System-on-Chip (SoC).


Cite: Syifaul Fuada, Trio Adiono, Angga Pratama Putra, and Erwin Setiawan, “Design of Reconfigurable System-on-Chip Architecture for Optical Wireless Communication,” vol. 14, no. 10, pp. 965-970, 2019. Doi: 10.12720/jcm.14.10.965-970.
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