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An Approximate Analytical Performance Model for Multistage Interconnection Networks with Backpressure Blocking Mechanism

John Garofalakis 1 and Eleftherios Stergiou 2
1. Department of Computer Engineering and Informatics, University of Patras and, Research Academic Computer Technology Institute Patras, Greece
2. Department of Information Technology and Telecommunications, ATEI of Epirus, Greece

Abstract— Multistage Interconnection Networks (MINs) are used to interconnect different processing modules in various parallel systems or on high bandwidth networks. In this paper an integrated performance methodology is presented. A new approximate performance model for self-routing MINs consisting of symmetrical switches which are subject to a backpressure blocking mechanism is analyzed. Based on this, the steady-state distribution of the queue utilization is estimated and then all important performance metrics are calculated. Moreover, a general evaluation factor which helps in choosing a better performance MIN in comparison with other similar MIN architecture specifications is defined. The model was exemplified for the case of symmetrical single- and double-buffered MINs. It provides accurate results and converges very quickly. The obtained results were validated by extensive simulations and were compared to existing related work in the literature.

Index Terms— multistage interconnection networks, Banyan networks, blocking, performance analysis, switching networks

Cite: Harry Gao, Seth Utecht, Gregory Patrick, George Hsieh, Fengyuan Xu, Haodong Wang, and Qun Li, "High Speed Data Routing in Vehicular Sensor Networks," Journal of Communications, vol. 5, no. 3, pp.247-261, 2010. Doi: 10.4304/jcm.5.3.247-261