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An Efficient Deterministic Edge Traffic Distribution Network-on-chip Routing Algorithm Design

Eric Mueller, Cameron Lane, Yefa Mai, Pedro Valencia, and Nan Wang
Department of Electrical and Computer Engineering, California State University, Fresno, USA
Abstract—Network-on-chip architectures emerged as promising solutions for future system-on-chip communication architecture designs. However, the switching and routing algorithm design of network-on-chip communication architectures are still facing great challenges. To address the deficiencies of the existing routing algorithms, a new deterministic network-on-chip routing algorithm-- Edge Traffic Distribution routing and its specifics are proposed in this paper. In the proposed algorithm, the traffic which involves the edge routers will be directed to go through the edges first instead of entering into the center of the network. It will greatly alleviate the congestion around the center of the network so as to help improve the overall system performance. Simulation of the proposed Edge Traffic Distribution algorithm and three existing routing algorithms has been carried out using NIRGAM network-on-chip simulator. Simulation results illustrate that the performance of the Edge Traffic Distribution routing algorithm exceeds the performance of the existing routing algorithms in term of average latency and network power consumption. 

Index Terms—Network-on-chip, routing algorithm, power consumption, communication latency.

Cite: Eric Mueller, Cameron Lane, Yefa Mai, Pedro Valencia, and Nan Wang, " An Efficient Deterministic Edge Traffic Distribution Network-on-chip Routing Algorithm Design," Journal of Communications, vol. 13, no. 10, pp. 594-600, 2018. Doi: 10.12720/jcm.13.10.594-600.

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